PDF资料描述
CMOS for optimum speed/powerFunctional DescriptionThe CY62136V is a high-performance CMOS static RAM or-ganized as 131,072 words by 16 bits This device features ad-, LIST/103to 3 GHz Typical applications for this PIN Diodes areswitches and attenuators in wireless, mobile and TV-systemsFeatures, LIST/103(Per Leg) Frequency limited by TJ max VA = 15 X VR typicalPart number 20CJQ045VR Max DC Reverse Voltage (V)VRWM Max Working Peak Reverse Voltage (V), LIST/103Notes:1 Customers requiring delivery in Tape and Reel should add the character “T” to the end of the part number Example: GS82032T-100IT2 The speed column indicates the cycle frequency (MHz) of the device in Pipeline mode and the latency (ns)in Flow Through mode Each device is Pipeline/Flow Through mode-selectable by the user, LIST/103Description M/A-COM’s AT90-0413 is a GaAs FET 4-Bit digitalattenuator with integral driverStep size is 1 dB providing a 15 dB attenuation rangeThis device is in an FQFP-N , LIST/103 Access time:50 ns/60 ns/70 ns/80 ns (max) Power dissipationActive mode: 945 mW/945 mW/990 mW/825 mW/715 mW (max)Standby mode: 105 mW (max) (HM51(S)4265D-5/6R), LIST/103CY27C256-120ZC Z32 32-Lead Thin Small Outline PackageCY27C256-120WMB W16 28-Lead (600-Mil) Windowed CerDIP Military150 CY27C256-150JC J65 32-Pin Rectangular Plastic Leaded Chip Carrier CommercialCY27C256-150PC P15 28-Lead (600-Mil) Molded DIP, LIST/103fore, the ROM consists of 8 banks of 64 characters each,where 4 of these 8 banks are displayed by loading the 4bank address registers with the appropriate 3 bit code Thisallows the programmer to switch between two different OSD, LIST/1032000 Jan 31 10Philips Semiconductors Preliminary specificationIntegrated MPEG AVGD decoders SAA7215; SAA7216; SAA7221SDRAMDATA1(9) 39 I/O SDRAM data 1 input or output (bit 9), LIST/103frames specified by FSEL[1:0] of the $92 command register, the frame sync protection window is ignored as ULKFS becomes H and the following frame sync detected is immediately accepted If the frame sync is accepted, ULKFS signal becomes "L" to accept the frame sync detected in the windowDIGITAL SIGNAL PROCESSOR FOR CDP S5L9290X, LIST/103
