PDF资料描述
DESCRIPTIONRugged glass package, using a high temperature alloyedconstructionThe SOD61AD2 is hermetically sealed and fatigue free as, LIST/107Output, HIGH Impedance, Active LOWPTAG indicates when the status frame is being trans-mitted over PDAT It is asserted when the status frameis transmitted, LIST/107ULCE80 887 108 10 80 50 142 106 35 150 10 200ULCE80A 887 980 10 80 50 129 116 35 150 10 200ULCE90 100 122 10 90 50 160 94 35 300 10 200ULCE90A 100 111 10 90 50 146 103 35 300 10 200, LIST/107contact, respectively These stampings are designed for F5 MicroCans and dwelled contactThe Front Panel Button Holder is available in a4-button version (DS1401-04, picture) and as a 24-buttonpanel DS1401-24 Both versions come with double-sided adhesive tape for mountingDS1401, LIST/107Relay drivers, high-speed inverters, converters, andother general high-current switching applicationsFeaturesLow collector-to-emitter saturation voltage, LIST/107) MODE 3200 to 4499 150 Fundamental/AT 9000 to 9999 60 Fundamental/AT4500 to 5999 120 Fundamental/AT 10000 to 12999 50 Fundamental/AT, LIST/107 Programmable output rise/fall time Programmable slew and skew control for CPUCLK,PCICLK, AGP, REF, 48MHz and 2448MHz Real time system reset output, LIST/107 = 10 V 08 to 2 019C0070C0069C0065C0084C0085C0082C0069C0083 C0066C0069C0078C0069C0070C0073C0084C0083 C0065C0080C0080C0076C0073C0067C0065C0084C0073C0079C0078C0083C0068 Low On-Resistance:35 C0087C0068 Secondary Breakdown Free:260 V, LIST/10705 02 15 22 28 700 100 20 5 425 09 20 22 28 565 30 20 10 420 07 20 22 28 590 30 20 10 430 10 20 21 28 630 40 20 10 3, LIST/107Interrupt to sub CPUCXD1818R chip select signalCXD1818R built-in register write signalCXD1818R built-in register read signal, LIST/107
