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Nom (V) Min (V) Max (V) mA c87c109A VMMBZ5221BT C1 24 228 252 20 30 1200 100 10MMBZ5223BT C3 27 257 284 20 30 1300 75 10MMBZ5225BT C5 30 285 315 20 30 1600 50 10, LIST/242MAX333AE-40°C to +85°CMAX333AMJP-55°C to +125°CStorage Temperature Range -65°C to +150°CLead Temperature (soldering, 10sec) +300°C, LIST/242Note: Mean and Sigma calculated from average loss at @ 105 MHzPlease Note that the photograph above indicates typical package only, not actual unit G28G33G2eG33G30G29, LIST/242CDMA or TDMA systems Ion implantation, nitride surface passivationand gold metallization ensure excellent device reliability 100% lottraceability is standard 35 Watts, 21–22 GHz, LIST/242= +27V to +525V (MAX1241); 73ksps, fSCLK= 21MHz (50% duty cycle); MAX1240—47μFcapacitor at REF pin, MAX1241—external reference; V, LIST/242PARALLEL inputs to each stage and SERIALinputs to the first stage via JK logic Registerstages 2, 3, and 4 are coupled in a serial D flip-flopconfiguration when the register is in the serial, LIST/242The MM54C164/MM74C164 shift registers are a monolithiccomplementary MOS (CMOS) integrated circuit constructedwith N- and P-channel enhancement transistors These 8-bitshift registers have gated serial inputs and clear Each regis-, LIST/242(LE) input is high, the Q outputs follow the data (D)inputs When LE is taken low, the Q outputs arelatched at the levels set up at the D inputsA buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high, LIST/242OPA2364AIDGKR ACTIVE VSSOP DGK 8 2500OPA2364AIDGKT ACTIVE VSSOP DGK 8 250OPA2364AIDR ACTIVE SOIC D 8 2500OPA2364ID ACTIVE SOIC D 8 100, LIST/242C 750mWJunction Temperature, TJ, LIST/242